MPEG-4 Video Decoder on ARM7-TDMI

Abstract

MPEG-4simpleprofile is being usedasthevideocompressionstandardinmobilevideocommunications.Videocompression requires significant amount of processing power. Currently,ARM cores are widely used in mobileapplicationsbecause of their low power consumption.As the processing power available is limited, optimizationof the applications is inevitable. This paper describes in detail about the implementation of MPEG-4simpleprofilevideodecoderon ARM7TDMI.

Key Words: MPEG-4DecoderARM7TDMI

1Introduction

Multimedia communication typically involves the transfer of large amounts of data. Therefore, compression of video, audio, and image data is essential for a costefficient use of existing communicationchannelsand storage media. Various coding standards have been developed fordifferent types of applications. The latest MPEG-4standard[1] defines a standardized framework fordifferenttypesofmulti-mediaapplications. Examples include mobile video communications, tele-shopping, interactive TV etc. MPEG-4 simpleprofile is being used mainly for mobile video communications. MPEG-4 video encoding and decodingrequires significantamountof computational power.Embedded system applications have become very complex in the recent times due to which RISC cores are increasinglybeingused.ThepopularRISC processor in embedded applications is ARM core because of its low power consumption and small insilicon, which are crucial for mobile applications. Hence, ARM cores are going to be used to implementvideoencodinganddecoding algorithmsinmobile video communications. In a mobile application, the amount of availableprocessing power is limited and having a direct impact on the battery life. As a result optimizationof applications to the maximum possible extent is necessary. Optimization can be done at algorithmicand specified architecture levels. This paper describes the optimization techniques for MPEG-4simple profile video decoder on ARM7TDMI core.

2ARM7TDMI Architecture

ARM7TDMI is a 32-bit microprocessor that giveshigh performance for low power consumption, which makes it attractive for embedded applications [2]. The ARM architecture is based onRISC principles, and the instruction set and relateddecode mechanism are much simpler than those ofCISC. This simplicity results in a high instructionthroughput and impressive real-time interrupt response from a small and cost-effective chip.Pipelining is employed so that all parts of the processing and memory systems can operate continuously. Typically, while one instruction is being executed, its successor is being decoded, anda third instruction is being fetched from memory. The ARM memory interface has been designed toallow the performance potential to be realized without incurring high costs in the memory system.ARM7TDMI does not have an instruction or data cache.